/*
 * plio_config.c
 *
 *  Created on: 2015��9��29��
 *      Author: huangkaibin
 */


#include "plio.h"
#include "plio_config.h"
const PlioInputConfig  plio_input_switch_config[] = {
	/*port         pin      negative     hidrive       delay mode       delay_time*/

//	ZERO_INPUT_CONFIG(),
	{PORT_P3,     PORT_PIN0,    FALSE,       FALSE,        HOLD_ON_NONE,    0U },/*P-KEY2 detect*/

};

const uint8 plio_input_switch_count = sizeof(plio_input_switch_config) / sizeof(plio_input_switch_config[0U]);
PlioInputData plio_input_switch_data[sizeof(plio_input_switch_config) / sizeof(plio_input_switch_config[0U])];

const PlioOutputConfig plio_output_switch_config[] = {
	/*  port                pin                poweron_output_level        sleep_output_level    */

	{PORT_P0,				PORT_PIN0,				OUTPUT_LEVEL_HIGH,			OUTPUT_LEVEL_HIGH	},/*DO-KL30-1-CHE-EN KL30 detect enable*/
	{PORT_P1,				PORT_PIN2,				OUTPUT_LEVEL_HIGH,			OUTPUT_LEVEL_HIGH	},/*DO-CAN-ERR*/
	{PORT_P4,				PORT_PIN1,				OUTPUT_LEVEL_HIGH,			OUTPUT_LEVEL_HIGH	},/*DO-CAN-STB CAN(TJA1043T)*/
	{PORT_P6,				PORT_PIN0,				OUTPUT_LEVEL_HIGH,			OUTPUT_LEVEL_HIGH	},/*DO-LIN-EN lIN(SIT1021)*/
	{PORT_P6,				PORT_PIN1,				OUTPUT_LEVEL_HIGH,			OUTPUT_LEVEL_HIGH	},/*DO-CAN-EN*/
	{PORT_P6,				PORT_PIN3,				OUTPUT_LEVEL_HIGH,			OUTPUT_LEVEL_HIGH	},/*CC-SPI-CS1 HALL-SS1*/
	{PORT_P7,				PORT_PIN3,				OUTPUT_LEVEL_HIGH,			OUTPUT_LEVEL_HIGH	},/*CC-SPI-CS2 HALL-SS2*/
};

const uint8 plio_output_switch_count = array_length(plio_output_switch_config);

